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Numeric Co-processors

If you make extensive use of applications that are concerned mainly with calculation then a numeric co-processor is essential. In this chapter we examine which co-processor is best and which application really benefit from one.


We have encountered the idea of a co-processors of a number of types in earlier chapters of this book. But historically the numeric co-processor was the earliest important and common example of a co-processor. A numeric co-processor takes over from the main processor whenever an arithmetic operation is needed. To be strictly accurate, numeric co-processors generally only take over when a floating point arithmetic operation is need. A floating point operation can be thought of as one that involves fractional numbers or results-but this isn’t entirely true because there is a way of handling fractional numbers that isn’t based on floating point numbers, called fixed point arithmetic. What all of this means to the user is that a numeric co-processor really only helps when you are doing arithmetic that involves something other than whole numbers, and usually only when multiplication, division or some complicated trigonometric or transcendental function is part of the calculation.

Watch the video down below.


Notice that this implies not only the use of an EISA/MCA bus machine but an EISA/MCA disk controller and network adapter cards. Of course, moving to an EISA/MCA based machine will not solve a performance problem caused by workstation overloading the capacity of the network itself, or anything else not related to the movement of data within the server. 



Landscape or Portrait

Landscape or Portrait


The one problem with  1024 x 1024 resolution colours  monitors and graphics  adapters  is their cost. A 1024 x 768 Super VGA display may not seem that for away from that desired resolution and it  much cheaper. The trouble is that  for an A4 page  the aspect  ratio is wrong – that is a Super VGA monitor is a landscape  monitor with 1024 pixels across the  screen. This makes it suitable  for full page  illustration  work or even for  viewing spreadsheets, but it isn’t much good for DTP work which nearly  always works with pages that are  longer than they are  wide.  There are a number of  solutions to  this problem. The first is the  obvious  hardware solution of turning the  monitor one its side to converting it to a portrait  monitors. This isn’t  quite as easy as a  it sounds because  you not only need to  alter the way  that the monitor is  mounted, but you also need special  video drivers   that turn the image through  the same right  angle! There are  a number of VGA  adapter cards that  support a rotated  display,  the best known example of which  is the Radius  Pivot.  This consists  of a specially designed Super VGA  card and a  monitor which  pivots. The  driver can detect  the orientation of the monitor  and so automatically switch  the  display from landscape to portrait interactively. This is an ideal display if you need  to work in   both landscape  and portrait  mode.

As alternative  software-only  solution is  to use a driver that creates a language  virtual screen using RAM. The actual  video display is then  used as a  window into  this larger display.  The advantage of this is that  the driver can also automatically  detect when the  mouse pointer is  about to be moved  off the edge of  the screen and   can move the  window to  show another  portion of the screen. The best known examples  of this approach  are SoftKicker for Venture GEM and  more Windows which work with any  Windows 3 application. These products  only work with  standard  and not Super VGA  but they still do  a good job of simulating  a full A4 display in monochrome and in colours.
Does the video bus matter?

Does the video bus matter?


Many graphics boards are available in MCA (both 16 and 32 bit), ISA (both 8 and 16 bit) and EISA, and this raises the question of the  effect the bus standard has on graphics performance. This question is a very difficult one.  On the face of it,  a graphics board requires a large amount of data to be transferred  at high speed and   therefore a 32-bit MCA or EISA  bus 


If you do need the increased resolution, i.e. beyond 1024 x 768 in 256 colourss for applications such as  DTP, CAD or  any graphics –dependent task, then your choice is  between an  intelligent controller or a specialized A4/A3 monitor. Which you chose  depends on your budget and you need for  colours.
Find many DTP and some CAD         applications colours is  a luxury and so an A4/A3 monitor is cheaper and more suitable. If you need  24-bit colours then an EISA or MCA based machine is preferable.

Exactly which model of graphics adapter you should  choose  will obviously  depends on how much you can  afford to spend,  but the most  crucial issue is the  existence of a working and  up-to-date  driver for the  applications that you  want to use.  Without a software driver  all of the super  features, speed and excellence of a graphics board are pointless because you cant use them.

Expanding page interleave systems


The organizations of page and page interleave memory was described in chapter 4 as a way of increasing the speed of systems when using slow memory devices. The only problem with interleaving is that is requires more than one bank of memory upgrades must be planned with this in mind. In other words, you can expand memory by a single bank but you have to expand in pairs if you want to take advantage of the speed increase provided by interleave or page interleave. This also explains the very common restriction on fitting the same type of device to pairs of banks. If a pair of banks is being used to provide alternate memory locations then each has to supply the same amount of memory!

For example, if a 386SX machine can support a maximum of eight 256Kx9 Bit or 1Mx9Bit SIMMs (i.e. it has four banks) then there is a very real problem in deciding how a 2MByte machine should be configured. A 2Mbyte machine could be realized by using eight 256Kx9Bit SIMMs or a pair of 1MByte SIMMs. Using the eight 256Kbyte SIMMs would produce a faster machine because the multiple banks of memory could be used in interleave mode to reduce wait states. Unfortunately, this configuration makes it impossible to increase the memory without starting again. The alternative arrangement of using two 1MByte SIMMs has the advantage is that, being a single physical bank of memory, interleaving cannot be used and so the system will run slower. In nearly all cases it is batter to accept the slower machine that results from using a single bank with larger capacity memory modules. The reason is that memory upgrade is usually inevitable and so it makes sense to prepare for the future at the expense of present performance.

Increasing cache memory


System that use cache often, but not always, allow you to upgrade the size of the cache memory as well as main memory. It is important to understand that doing so will increase the speed of your machine but not the total amount of memory available to programs – cache memory is entirely separate from main memory and the fast processor.
It is also important that you use exactly the type of memory chips specified by the manufacture – this is very critical to the reliable operation of your machine. Notice also that cache memory is very fast SRMA, not DRAM as used in main memory. In nearly all cases when you fit extra cache memory you have to change the configuration of the machine by changing jumpers or switches on the main board.


Mainboard or expansion board ?


Early 386 machines depended on the use of expansion boards to hold the majority of their RAM. This was mainly due to the low capacity of memory chips available at the time and hence the large number needed to produce any reasonable sized memory. The only problem with expansion boards in the type of connector/bus used to plug them intc the mainboard. For  the 386/486 the familiar ISA bus used on the  286/AT is grossly inadequate for memory  expansion, being limited  to 16 bits. In the case of the  16-bit  386SX, however, memory expansion via the ISA bus is the possibility. To overcome  the shortcoming of the ISA bus most manufactures  have opted for proprietary 32-bit bus connectors. In the case of the 386SX there have even been proprietary 16 bit bus connectors. These are  fast enough to support memory  expansion but they have the disadvantage  of not being standardized. If your machine uses a 32-bit proprietary memory  expansion bus then you have to buy plug-in cards that are made specially   for your machine and usually by the same manufacturer. This single source  situation is only a problem in that is restricts  your shopping around, keeping price  high, and you run a small risk of not being able to  obtain  expansion cards if buy any chance the manufacture should go out  of business. However, some  machines , notably  those made by  IBM and Compaq , have sold in sufficiently large numbers  for third  party manufacturers  to  offer  lower cost alternatives.
The only way of providing standard 32-bit memory expansion cards is to use either  the 32-bit MCA or EISA bus. Both these standards have been extensively  described in chapter 3. Briefly , they are both  can be out –performed  in terms of  simplicity, cost and speed  by memory  installed directly on the main-board .
Indeed, this last comment could be applied to most memory expansion adapters. That most economical and efficient form  of memory is  that installed  on the main board  of your machine, and the upper  limit on the amount  of memory  installable  without expansion  adapters  is and important consideration in choosing  a machine. If  your machine does need memory expansion  adapters then you can generally buy them fully  populated. i.e complete with chips, or with 0 Kbytes installed i.e without chips. If you want a  trouble-free life then buy expansion boards  fully populated . but if you want to save money then buy boards  and chips separately. The process of installing them on the mainboard. In many cases the cost of a memory expansion card is  close to that of a replacement mainboard, complete with the amount  of memory you require, and upgrading  in this way is often a sensible  alternative.
Finally, don’t fail into  the  trap of confusing  expanded memory, EMS or LIM memory boards  with the sort of memory boards. Used to extent the memory in 386/486 based systems. Expanded memory is described  in detail in chapter 10 but briefly 386/486 systems use extended memory as  opposed to expanded memory hardware. Any expanded  memory that  may be required can be produced by using software that converts  extended memory  to expanded  memory. If this important  topic is worrying you then turn to chapter 10.





Memory banks


So far we have concentrated on identifying the type and speed of memory  device that is needed, but you cannot add extra memory in any amount. For example, it seems reasonably  obvious that you cannot add a single  1MBit chip . The reason is simply that supplying 1  bit of each storage location in a megabyte  of memory doesn't allow you to store  a complete byte in any of the  locations. To be of any use , each location has to have a full complement of 8 bits (9 including parity) and so you have to fit  memory devices to give this number of bits at each location. For example, by fitting eight (or nine including parity) 1MBit chips. Another way of saying  this is that memory  has to be at  least eight (or nine) bits wide.
This restriction of fitting memory  in whole bytes seems reasonable enough, but the  386SX gets data form memory in 16-bit chunks and the rest of the  386  family  works  in 32-bit chunks. The argument about fitting memory in complete eight-bit  blocks also applies  to the 16-  and 32-bit  blocks used by the  386SX and rest of the 386 family. That is when the  processor tries to retrieve a 16-bit or 32-bit item of data from memory all 16 or 32 bits have to be there!
In other words:
ร˜  For the 386SX you have to add memory in 13-bit  wide chunks
And
ร˜  For the 386DX, 486DX and 486SX you have to add memory in 32-bit wide chunks.
The smallest  chunk of memory that you can add to a machine is usually referred to as a  bank and so the 386SX uses 16-bit banks and the rest use 32-bits banks.
The number of banks and the type  of memory device  that a machine  accepted  can have important implications for memory expansion. For example, suppose  you have a 386SX machine  with four SIMM sockets talking either 256Kx9Bit, 1Mx9Bit or 4Mx9Bit SIMMs. Simple minded  reasoning  suggest that you can reach any memory capacity by fitting mixtures of different types of SIMM in each socket (for example, two 256Kx9Bit SIMMs, one 1Mx9Bit SIMM and a 4Mx9Bit SIMM to give a total of 5.5 Mbytes). In fact you cannot and this configuration would most definitely be illegal! The reason is that  although there are four SIMM sockets these are  organized  as a pair of  banks each  consisting of two of the sockets. Each bank has to  be filled  or empty, i.e you can not have a  half used bank and is has to be filled  with the same type of  memory device. This severely restricts the possible  memory configuration and certainly makes the example configuration  illegal!
Once you realize that memory devices have to be added in whole banks, many of the strange  rules that apply to which memory sizes are reachable  and which are not  become clear some machines are even more restrictive than this and  demand not only  that you fit the  same type of  memory device to each bank  but to all of the banks. In this case configurations such as 2x256Kx9Bit SIMMs in bank 0 and 2x1Mx9Bit SIMMs in bank 1, giving a total of 3.5 Mbytes, would be illegal!
You can also see that having a limited number of banks can stop you  reaching the maximum configuration  of any given machine. For example in the  case of a  386DX or a 486,each bank would  have to consist of four  SIMM sockets. If there are two banks  then fitting all 4Mx9Bit  SIMMs would produce a total of 32 bytes. However, If the machine was initially  delivered  with 4Mbytes of RAM fitted  then this could only be supplied as four 1Mx9Bit SIMMs i.e  filling one bank. Notice that it is  impossible to supply this small amount of memory in any other  way as a single 4Mx9Bit SIMM wouldn't fill a whole bank. When you subsequently consider the upgrade  options you can only fill  the second  bank with more 1Mx9Bit SIMMs, giving a total of 8 Mbytes, or if you are allowed to mix the type of memory device, use four 4Mx9Bit SIMMs, giving a total  of  20 Mbytes. To reach the maximum memory you would  have no choice  but to remove the initial bank of 1Mx9Bit SIMMs.

The same  arguments apply to the  use of  DIL chips, only in this case the  numbers  involved are larger. That is for a 386SX, a bank of DIL chips consists of 16 (18 including parity) 1-bit devices and for the 386DX and 486 a bank consists of 32 (36 including parity) 1-bit devices. With chips having to be fitted  in multiples of 32 or 36 you can start  to see the  advantage  of memory  modules!
RAM speed

RAM speed


The final part of the specification of a memory upgrade is the speed of the devices needed. As already  describe in the previous chapter, access speed is measured  in nano-seconds or ns. The slowest devices have  access times of 150ns to 120ns. Medium speed devices are 100ns and fast access chips are 80ns, 65ns and 60ns. In most cases it isn’t possible to look at the design of a machine and easily deduce the speed of RAM chips needed. Indeed some systems will allow  you to use one  of a number of speed by  imposing additional  wait states for slower chips. If machine uses  page mode memory  access then it may  even be more  stringent in the type of chips  it uses than  simply specifying an overall access speed.
The simplest solution to finding out what type  of chips  your machine needs it to look in the manual! Failing this you cloud open the case and look for the area  where the existing  memory is installed  and read the device  code on one of the  chips – see Reading the chips. You can usually recognize where the memory  device are either  because they will be the only SIP/SIMM device or because they will be  arranged in a regular rectangular array of identical  DIL chips.
It doesn’t really matter if you use  chips that are faster than your machine  needs. They won’t  male it work any faster and they will cost more but at least they will work.  This is one solution if you simply  cannot find out what speed  of memory device to use. On the order hand, Using chips that are slower than your  machine needs will cause memory errors to be reported during the power on  Self Test (POST) routine . It is even possible that if the chips  are only a little  slower than your machine needs then they will pass the POST routine but fail intermittently later on when your machine has  warmed up a  little. (RAM chips are  more tolerant of being worked faster when they are cooler.)
Most machines have  to be informed , either via jumpers, dip switches or software setup, if what speed  chips you are using  so that they can the  appropriate number of wait states. Once again introducing more wait states than necessary will

Reading and chips

Reading and chips

One f the most  Intermediating   aspect of trying to buy extra RAM in the way that chips,  SIPs and SIMMs are described  in catalogues an manuals. Part of the problem is due to each manufacturer assigning their one product codes to each type of chip they produce. The assignment is fairly  arbitrary and so  you shouldn’t expect too much sense in the sort of numbers marked on a chip but they can provide a general guidelines to the chip’s type.
The first part of a chip’s part number usually  indicated the amount and organization of the memory  that the chip provides. The same amount of memory can be organized in many different ways. For example a chip that stores 1Mbit  can be arranged to provide  128Kx8bits (i.e 128Kbytes), 256Kx4bits or 1Mx1bit of storage. As most computers can only work with  memory locations that can store a complete byte, The organization of the chip indicates the smallest number that can be used to increase memory  capacity. For example , You could use one 128Kx8bit chip to increase memory by 128Kbytes,  but you would need at least two 256Kx4bit  chips (i.e 256KBytes) and eight Mx1bit chips (i.e 1 Mbyte). (The ignores the complication of needing a parity bit and memory banks, see later.)
The final digits of chip’s part number generally give its speed in nano-seconds  but often leaving out or adding in extra zeros . For example, The product code for an 80ns chip might end in -80, -08 or just -8 as the manufactures choose!
Often you will find chips listed simply by their organization and speed. For example , 256Kx4 120ns DRAM, 1Mx9 80ns SIMM 256Kx1 100ns SIP ect.. On other occasions you will find their full part numbers quoted. For example , a 41256-80 is a 256Kx1bit 80ns DRAM, 41464-12 is a 64Kx4bit 120ns  DRAM and a p21010-08 is a 1Mx1bit 80ns DRAM. Form these examples you can see that there  is some connection between part numbers and chip types -  but not enough to be certain without looking them up! If you are at all in doubt about the type of memory that you machine needs then check its  manual or contact one of the specialist memory supplies listed at the end of this all posts.

parity

parity

The first personal computers were mainly used for recreation and the consequences of any undetected error was slight. However, if a machine is used for business or any serious  purpose it has to incorporate some method of error detection. The simplest and most commonly used method is party checking. This involves adding and extra  bit to every byte of data stored so as to make the number of 1 bits even. This a called even parity checking as opposed to making the total number of 1 bits odd i.e odd parity For example, if the data is 011101100 then the parity bit is 1 because there are five 1s in the data and making the parity bit 1 makes the total six which is even. If the data is 10100000 then the parity bit is 0 because the total number of 1s is already even. Each time data is read from memory is parity is checked. If a single bit has changed, either a 0 turning in to 1 or a 1 into a 0, since the data was stored  then the total number of 1  bits will not be even  and a parity error will be detected

The problem with parity checking is that while it is certain to detect  a change in a single bit ,if two bits change then this  leaves the total  number of 1 bits even and a parity error will nit occur. However, in modern computer  systems the probability of a single bit error is so small that the probability of two such  errors in the same  memory location a vanishingly small. Indeed, such errors are so rate that it is arguable that parity checking itself is redundant.

As is takes eight bits to store a single byte, adding an extra bit for parity checking makes the total number of bits need equal to nine. This is the reason that 386/486  systems need nine  1MByte chips or 9xMByte SIPs or SIMMs for every Mbytes of memory you also have an additional 1MByte dedicated to parity checking! In same machines you can disable parity checking and make use of the unused chips to increase the amount of memory available. As transient memory errors are very rare, and the memory is  tested for permanent faults every time you switch the machine on,  you might consider this a reasonable trade-off.

Data transfer rates - chapter ( lesson 2.4 )

Data transfer rates



Clock speed and MIPS both reflect the potential processing power of a machine but the processor is not the only component in a real machine. A typical system is comprised of a processor, memory, a video display and disk drives.
 


In running a program data has to be moved between these system components - from memory to processor, from memory to disk, from processor to video etc.. Connections are made between the different components by sets of wires called buses. In practice a bus is more than just a set of wires, it also includes sets of rules or protocols that govern how data should be transferred, what its destination is etc.. Another name for a data bus is a data highway which is more descriptive of its role in transferring data from one system component to another.

The speed of these transfers between the components of a system affects how long a program takes to run. Different programs will make demands on different types of data transfer. For example, a database program will spend much of its time transferring data from disk to memory and vice verse whereas a DTP program will spend more of its time transferring data to and from the video display. The importance of high data transfer rates between the different system components depends very much on the type of work that a program is engaged in. In an ideal world a system would optimize the transfer rates between all system components but in the real world this results in a very expensive machine! A more realistic approach is to optimize those transfer rates that are critical to the application.


Data transfer rates are usually measured in either MBytes per second or MBits per second and it is important to be aware of which measure is in use. 1MByte per second is eight times faster than MBit per second.


There are two factors that affect data transfer rates - clock speed and band width. Clock speed is simply the rate at which a unit of data can be transferred and band width is the size of the unit of transfer. In other words, at each clock pulse an item of data is transferred but the total amount of data transferred can be increased by sending more per clock pulse. In physical terms band width corresponds to the number of wires in a bus available for data transfer. In simple terms it needs one wire connection to transfer a single bit of data between two units.

The problems of speed - chapter 2 ( lesson 2.3 )

The problems of speed


Compared to the typical 1MHz and 2MHz clock rates used in the first desktop computers, the 33MHz and 40MHz clock rates in use today pose some interesting problems for designers and users. The difficulty stems from the fact that current clock rates are well into the radio frequency range. For example, some FM radio stations transmit on frequencies lower than 80MHz and stations in the long wave band use frequencies as low as 0.1MHz! The reason why this becomes more of a problem as clock rates increase is that the efficiency of an aerial increases with frequency. This means that the copper tracks connecting the chips that make up a computer radiate significant amounts of radio frequency noise as the clock rate increases. If you have tried listening to a radio near to a computer you will have heard the problem.

However, the problem isn’t to do with radio interference, this can be reduced by using a specially treated metal case, the problem is that the radio emissions cause distortion of the pulses that the copper tracks carry and lead to interference or ‘crosstalk’ between tracks. You can think of it as the copper tracks becoming increasingly leaky as the clock rate goes up. It is possible to do something about this by careful layout of the printed circuit board but many early machines used printed circuit boards that were designed for slower speeds and were often unreliable. Today there is no real problem with clock rates up to 40MHz but there is some doubt about the possibility of pushing the rate any higher without unreasonable increases in cost. (This is one reason for the use of clock doubling circuits to increase a 25MHz external clock to 50MHz.)

Another common practice that can cause problems is using chips above their recommended clock rate. The frequency at which a chip is guaranteed to work is usually a very conservative estimate of actual maximum operating frequency. Before true 40MHz processors were available it was a common practice for manufacturers to select the higher quality components from a batch of 33MHz parts and push them to 50MHz. This sometimes resulted in a machine that would refused to work if the room temperature was too high !


                       doesn’t result in the program taking half the time. Even so clock speed is a valuable measure of potential performance. The point is that it determines the rate at which instructions are obeyed. Doubling a machine’s clock speed halves the time a program takes to run in the best possible case.

If you are comparing identical processors then clock speed is a good measure but it isn’t as meaningful between processors. Even so clock speed is still quoted as a way of showing how machines based on the Intel family have increased in power. The original PC had a clock speed of 4.77MHz and the first AT 6MHz (quickly increased to 8MHz). The fastest 286 machines used clock speeds of 10MHz, 12MHz, 16MHz and even on occasion 20MHz. 386 systems have been available in clock speeds of 16MHz, 20MHz, 25MHz, 33MHz and even higher. The 486 has been manufactured in 25MHz, 33MHz and 40MHz versions.

At this point you might be wondering why every processor, especially those in the 386 family, isn’t available at every clock speed. The answer is that manufacturers have an obvious desire to rationalise the range that they offer and this goes for chip and machine manufacturers. This means that processors 

                                                                                 






are produced in a range of clock speeds that tries to eliminate overlap in processing power. For example, the 20MHz 386DX died out when the 25MHz 386SX became available. In this case the 386SX version was as powerful and cheaper than the DX version. Thus while a complete listing of all the clock speeds that have ever been produced makes interesting reading it isn’t likely to correspond to the range available or desirable at any given time.

To get some idea of how clock speeds and MIPS compare and how the different processor types offer different ranges of power then see Figure 2.1.


Clock speed is the simplest measure of the speed of a processor and it works very well as long as you confine your attention to a single type of processor. However it is prone to misrepresent the speed of a processor if the number of Instructions that are obeyed per clock pulse is modified. For example, you could modify a 386 chip to execute its Instructions in half the number of clock pulses. This means that you could have two 386 chips with the same clock speed but one would have twice the MIPS of the other! If you think that this is entirely theoretical it is worth mentioning that the 




486 is in many senses nothing more than a 386 that executes an important subset of instructions in fewer clock cycles and the 486DX2 doubles the external clock speed so in effect obeying all instructions in half the time!

To compensate for the possibility of there being different numbers of instructions per clock pulse it is useful to use the Landmark speed. This is simply the speed that an original 286AT would have to be run at to give the same performance. The Landmark speed is good in the sense that it does provide a reasonably realistic measure of performance but it can also be used to mislead if a manufacturer quotes a clock speed that is in fact a Landmark speed. A typical set of Landmark speeds quoted for a range of machines from one manufacturer can be seen in Figure 2.2. Notice that this graph is also influenced by other design aspects than the type of processor. For example in the case of the 486 machines a cache (see Chapter 4) was used to produce an even greater speed increase over the 386SX and 386DX machines.




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